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Publications by S.S. Sapatnekar

Optimizing Large Multiphase Level-Clocked Circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ElectricalSoftwareComputer GraphicsComputer-Aided DesignElectronic Engineering
1999English

Simultaneous Shield and Buffer Insertion for Crosstalk Noise Reduction in Global Routing

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
HardwareElectronic EngineeringElectricalArchitectureSoftware
2007English

Optimization of Integrated Spiral Inductors Using Sequential Quadratic Programming

English

An Integrated Algorithm for Combined Placement and Libraryless Technology Mapping

English

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