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Publications by T.i Rajalakshm
Design of Vedic Multiplier Using SQRT Carry Select Adder (CSLA)
International Journal of MC Square Scientific Research
Related publications
Low Power High Speed SQRT Carry Select Adder
IOSR journal of VLSI and Signal Processing
Modified Booth Multiplier Using Wallace Structure and Efficient Carry Select Adder
International Journal of Computer Applications
Enhanced Self Checking Carry Select Adder Using Dynamic Logic Based Full Adder
International Journal of Recent Technology and Engineering
Engineering
Management of Technology
Innovation
Design of a Modified Carry Select Adder With Single Fault Tolerant Architecture
IJARCCE
Design of an Optimized High Speed Multiplier Using Vedic Mathematics
Contemporary Engineering Sciences
Materials Science
Mutagenesis
Computer Networks
Fluid Flow
Communications
Engineering
Health
Transfer Processes
Toxicology
Social Sciences
Efficient Serial Multiplier Design Using Ripple Counters,Kogge-Stone Adder and Full Adder
International Journal of Computer Applications
Review Paper on Efficient VLSI Architecture for Carry Select Adder
International Journal of Computer Applications
Incorporation of Reduced Full Adder and Half Adder Into Wallace Multiplier and Improved Carry-Save Adder for Digital FIR Filter
Circuits and Systems
Design and Analysis of Carry Look Ahead Adder Using CMOS Technique
IOSR Journal of Electronics and Communication Engineering
