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Publications by Vaishnavi N
Design of FFT Architecture Using Kogge Stone Adder
International Journal of Advances in Signal and Image Sciences
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Efficient Serial Multiplier Design Using Ripple Counters,Kogge-Stone Adder and Full Adder
International Journal of Computer Applications
Design and Implementation of Kogge Stone Adder Using CMOS and GDI Design: VLSI Based
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Improved Fault Tolerant Sparse KOGGE Stone ADDER
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Higher Radix Kogge-Stone Parallel Prefix Adder Architectures
FPGA Implementation of Area Efficient CMOS Multiplier Using Fast Kogge Stone Look Ahead Logarithmic Adder
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Testing Ripple Carry Adder Using Bist Architecture
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Design of Adder Using Quantum Cellular Automata
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Optimized CMOS Design of Full Adder Using 45nm Technology
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Design of a Modified Carry Select Adder With Single Fault Tolerant Architecture
IJARCCE
