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Publications by Yinhe Han
A Signal Degradation Reduction Method for Memristor Ratioed Logic (MRL) Gates
IEICE Electronics Express
Electronic Engineering
Condensed Matter Physics
Optical
Electrical
Magnetic Materials
Electronic
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Variability-Tolerant Memristor-Based Ratioed Logic in Crossbar Array
Novel Implementation Method to Realize All-Optical Logic Gates
Optical Engineering
Engineering
Optics
Atomic
Molecular Physics,
Nanocell Logic Gates for Molecular Computing
IEEE Transactions on Nanotechnology
Electronic Engineering
Nanotechnology
Computer Science Applications
Electrical
Nanoscience
Learning Logic Gates Using Augmented Reality
International Journal of Multimedia and Recent Innovation
Cascaded Logic Gates in Nanophotonic Plasmon Networks
Nature Communications
Astronomy
Genetics
Molecular Biology
Biochemistry
Chemistry
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Single-Photon Two-Qubit Logic Gates
AIP Conference Proceedings
Astronomy
Physics
Compliance of Reversible Gates in Logic Designing
International Journal of Electrical, Electronics and Computers
Learning Logic Gate Through 7-Gates Game
International Journal of Multimedia and Recent Innovation
Broadband Reconfigurable Logic Gates in Phonon Waveguides
Scientific Reports
Multidisciplinary
