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Publications in Architecture
Runahead Threads to Improve SMT Performance
Proceedings - International Symposium on High-Performance Computer Architecture
Hardware
Engineering
Architecture
Structured Document Storage and Refined Declarative and Navigational Access Mechanisms in HyperStorM
VLDB Journal
Hardware
Information Systems
Architecture
Model-Independent Schema Translation
VLDB Journal
Hardware
Information Systems
Architecture
Applying In-Transit Buffers to Boost the Performance of Networks With Source Routing
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
A Simple Distributed Loop-Free Routing Strategy for Computer Communication Networks
IEEE Transactions on Parallel and Distributed Systems
Hardware
Computational Theory
Signal Processing
Architecture
Mathematics
Systolic Evaluation of Polynomial Expressions
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
Logic Testing of Bridging Faults in CMOS Integrated Circuits
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
Multilevel Optimization of Pipelined Caches
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
A Stabilizing Deactivation/Reactivation Protocol
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
Two Operand Binary Adders With Threshold Logic
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
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