Amanote Research

Amanote Research

    RegisterSign In

New Slow-Control FPGA IP for GBT Based System and Status Update of the GBT-FPGA Project

doi 10.22323/1.313.0083
Full Text
Open PDF
Abstract

Available in full text

Date

March 5, 2018

Authors
Julian Maxime MendezSophie BaronAlessandro CaratelliPedro Vicente Leitao
Publisher

Sissa Medialab


Related search

FPGA-Based Multiprocessor System for Injection Molding Control

Sensors
InstrumentationInformation SystemsElectronic EngineeringBiochemistryAnalytical ChemistryMolecular Physics,ElectricalAtomicMedicineOptics
2012English

FPGA Based Powertrain Control for Electric Vehicles

2011English

Two IP Protection Schemes for Multi-Fpga Systems

2012English

Physical Fault Detection and Recovery Methods for System-Lsi Loaded FPGA-IP Core

IEICE Transactions on Information and Systems
Electronic EngineeringPattern RecognitionHardwareComputer VisionElectricalArchitectureArtificial IntelligenceSoftware
2017English

The Gigabit Link Interface Board (GLIB), a Flexible System for the Evaluation and Use of GBT-based Optical Links

Journal of Instrumentation
InstrumentationMathematical Physics
2010English

FPGA Based OTP Generation System for Data Security

International Journal of Recent Technology and Engineering
EngineeringManagement of TechnologyInnovation
2020English

FPGA Based Sliding Mode Control for High Frequency SEPIC

2011English

New Version of AES-ECC Encryption System Based on FPGA in WSNs

Journal of Software Engineering
Software
2015English

FPGA Based Coprocessors for Clouds

English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2026 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy