Amanote Research

Amanote Research

    RegisterSign In

Development of ASIC Chip-Set for High-End Network Processing Application a Case Study

doi 10.1109/aspdac.2002.995029
Full Text
Open PDF
Abstract

Available in full text

Date

Unknown

Authors
S. Patel
Publisher

IEEE Comput. Soc


Related search

Layout-Accurate Design and Implementation of a High-Throughput Interconnection Network for Single-Chip Parallel Processing

2007English

Front-End ASIC for a Silicon Compton Telescope

2007English

Application of a Neural Network for Stylized Image Processing

Electronic and Acoustic Engineering
2019English

A 3-Wire SPI Protocol Chip Design With Application-Specific Integrated Circuit (ASIC) and FPGA Verification

2017English

The GRD Chip: Genetic Reconfiguration of DSPs for Neural Network Processing

IEEE Transactions on Computers
HardwareArchitectureMathematicsComputational TheoryTheoretical Computer ScienceSoftware
1999English

System-On-Chip Sensor Fusion Front-End Self-Healing Design for Network-On-Chip Digital Communications

2017English

Characterization of a Serializer ASIC Chip for the Upgrade of the ATLAS Muon Detector

IEEE Transactions on Nuclear Science
Electronic EngineeringNuclearNuclear EnergyHigh Energy PhysicsEngineeringElectrical
2015English

eLine100: A Front End ASIC for LCLS Detectors in Low Noise Applications

IEEE Transactions on Nuclear Science
Electronic EngineeringNuclearNuclear EnergyHigh Energy PhysicsEngineeringElectrical
2014English

A Comparison of Back-End Frameworks for Web Application Development

Zbornik Veleučilišta u Rijeci
2019English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2025 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy