Implementing a Safe Embedded Computing System in SRAM-based FPGAs Using IP Cores: A Case Study Based on the Altera NIOS-II Soft Processor
doi 10.1109/lascas.2011.5750278
Full Text
Abstract
Available in
Date
February 1, 2011
Authors
Publisher
IEEE
doi 10.1109/lascas.2011.5750278
Available in
February 1, 2011
IEEE