A High Speed Image Processor With Variable Function Reconfigurable Pipeline Processor

IEEJ Transactions on Electronics, Information and Systems - Japan
doi 10.1541/ieejeiss1987.112.2_81
Full Text
Abstract

Available in full text

Date
Authors
Publisher

Institute of Electrical Engineers of Japan (IEE Japan)

Related search

A Review on Reconfigurable Processor for Binary Image Processing.

International Journal of Advanced Research
2016English

The Reconfigurable Arithmetic Processor

ACM SIGARCH Computer Architecture News
1988English

Reconfigurable Synchronized Dataflow Processor

English

Simulation and Analysis of a Pipeline Processor

English

A High Speed Montgomery Processor of 256-Bit on FPGA

2016English

High Throughput Parallel-Pipeline 2-D DCT/IDCT Processor Chip

The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology
2006English

High Speed Reference Bit Pattern Generation With Multi-Processor Parallel Processing

Transactions of the Society of Instrument and Control Engineers
1988English

Design and Implementation of a Ultra-High-Speed Pipelined FFT Processor

Transactions of the Society of Instrument and Control Engineers
1985English

A Reconfigurable Optoelectronic Interconnect Technology for Multi-Processor Networks

English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2024 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy