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Modeling and Mitigating Transient Errors in Logic Circuits
IEEE Transactions on Dependable and Secure Computing
- United States
doi 10.1109/tdsc.2010.26
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Categories
Electronic Engineering
Electrical
Computer Science
Date
July 1, 2011
Authors
I Polian
J P Hayes
S M Reddy
B Becker
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
