Amanote Research

Amanote Research

    RegisterSign In

Global Compact Passive Macromodeling Algorithms for High-Speed Circuits

doi 10.22215/etd/2006-06149
Full Text
Open PDF
Abstract

Available in full text

Date

Unknown

Authors
Dharmendra Saraswat
Publisher

Carleton University


Related search

Distributed ESD Protection for High-Speed Integrated Circuits

IEEE Electron Device Letters
Electronic EngineeringOpticalElectricalMagnetic MaterialsElectronic
2000English

Accurate Macromodeling of High-Speed Interconnects Characterized by Time-Domain Measurements

English

Evolutionary Algorithms for Global Parametric Fault Diagnosis in Analogue Integrated Circuits

Bulletin of the Polish Academy of Sciences: Technical Sciences
Information SystemsComputer NetworksMolecular Physics,CommunicationsEngineeringAtomicOpticsArtificial Intelligence
2012English

Architectures for High Dynamic Range, High Speed Image Sensor Readout Circuits

English

High-Speed Computer Simulation of Electrical Circuits

Energy Engineering and Control Systems
2015English

Design of On-Chip Testing Memory for High Speed Circuits

CVR Journal of Science & Technology
2014English

Design Considerations for High Speed Clock and Data Recovery Circuits

English

High-Speed Parameter Estimation Algorithms for Nonlinear Smart Materials

2007English

Scheduling and Transport for File Transfers on High-Speed Optical Circuits

Journal of Grid Computing
Information SystemsComputer NetworksHardwareCommunicationsArchitectureSoftware
2003English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2026 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy