A Pseudo Random Number Generator Based on the Chaotic System of Chua's Circuit, and Its Real Time FPGA Implementation

Applied Mathematical Sciences
doi 10.12988/ams.2013.13242
Full Text
Abstract

Available in full text

Date
Authors
Publisher

Hikari, Ltd.

Related search

Implementation of High-Speed Pseudo-Random-Number Generator With Chaotic and Random Neural Networks

2020English

A Horadam-Based Pseudo-Random Number Generator

2014English

On-The-Fly Evaluation of FPGA-Based True Random Number Generator

2009English

Design and FPGA Implementation of a Pseudo-Random Bit Sequence Generator Using Spatiotemporal Chaos

2006English

Efficient Pseudo-Chaotic Number Generator for Cryptographic Applications

International Journal of Intelligent Computing Research
2020English

Efficient Design of Chaos Based 4 Bit True Random Number Generator on FPGA

International Journal of Engineering and Technology(UAE)
ArchitectureHardwareEngineeringChemical EngineeringBiotechnologyEnvironmental EngineeringComputer Science
2018English

FPGA-Based Software-Defined Radio and Its Real-Time Implementation Using NI-USRP

2017English

C++ Based System Synthesis of Real-Time Video Processing Systems Targeting FPGA Implementation

2007English

Chaos-Based Bitwise Dynamical Pseudorandom Number Generator on FPGA

IEEE Transactions on Instrumentation and Measurement
Electronic EngineeringElectricalInstrumentation
2019English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2024 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy