Vertical InAs/InGaAs Heterostructure MOSFETs on Si

Nano Letters - United States
doi 10.1021/acs.nanolett.7b02251
Full Text
Abstract

Available in full text

Date
Authors
Publisher

American Chemical Society (ACS)

Related search

Sub-10-Nm-Diameter InGaAs Vertical Nanowire MOSFETs: Ni Versus Mo Contacts

IEEE Transactions on Electron Devices
Electronic EngineeringOpticalElectricalMagnetic MaterialsElectronic
2018English

Scaling of Vertical InAs–GaSb Nanowire Tunneling Field-Effect Transistors on Si

IEEE Electron Device Letters
Electronic EngineeringOpticalElectricalMagnetic MaterialsElectronic
2016English

RF Characterization of Vertical InAs Nanowire Wrap-Gate Transistors Integrated on Si Substrates

IEEE Transactions on Microwave Theory and Techniques
Electronic EngineeringRadiationElectricalCondensed Matter Physics
2011English

High Performance, Strained-Ge, Heterostructure P-MOSFETs

English

1/ F and RTS Noise in InGaAs Nanowire MOSFETs

Microelectronic Engineering
SurfacesElectronic EngineeringCondensed Matter PhysicsElectronicMolecular Physics,NanoscienceOpticalElectricalAtomicMagnetic MaterialsFilmsNanotechnologyOpticsCoatings
2017English

Vertical InAs Nanowire MOSFETs With IDS = 1.34 mA/µm and Gm = 1.19 mS/µm at VDS = 0.5 V

2012English

Использование Микродисковых Лазеров С Квантовыми Точками InAs/InGaAs Для Биодетектирования

Журнал технической физики
2019English

Two-Dimensional Carrier Transport in Si MOSFETs

VLSI Design
Electronic EngineeringComputer GraphicsHardwareElectricalArchitectureComputer-Aided Design
1998English

Influence of Si-Doping on Structure in InAs Nanowires

Acta Crystallographica Section A Foundations of Crystallography
2010English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2024 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy