Amanote Research
Register
Sign In
Algorithm Validation and Hardware Design Interactive Approach
doi 10.1109/smicnd.1996.557380
Full Text
Open PDF
Abstract
Available in
full text
Date
Unknown
Authors
M.-T. Lazarescu
M. Sartori
Publisher
IEEE
Related search
Design of FPGA Hardware Based on Genetic Algorithm
Hardware–software Co-Design of an Iris Recognition Algorithm
IET Information Security
Computer Networks
Software
Information Systems
Communications
Hardware-Software Complex «Interactive Whiteboard»
Science and Education a New Dimension
Hardware Trojan Prevention Using Layout-Level Design Approach
A Geometric Approach for Robotic Arm Kinematics With Hardware Design, Electrical Design, and Implementation
Journal of Robotics
Control
Systems Engineering
Computer Science
A Novel Hardware-Oriented Stereo Matching Algorithm and Its Architecture Design in FPGA
IFIP Advances in Information and Communication Technology
Computer Networks
Information Systems
Management
Communications
Design of Sign Sounds Using an Interactive Genetic Algorithm
Dither NN: Hardware/Algorithm Co-Design for Accurate Quantized Neural Networks
IEICE Transactions on Information and Systems
Electronic Engineering
Pattern Recognition
Hardware
Computer Vision
Electrical
Architecture
Artificial Intelligence
Software
Hardware/Software Partitioning of Combination of Clustering Algorithm and Genetic Algorithm
International Journal of Control and Automation
Control
Systems Engineering
