Efficient Static Compaction Techniques for Sequential Circuits Based on Reverse-Order Restoration and Test Relaxation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - United States
doi 10.1109/tcad.2006.873895
Full Text
Open PDFAbstract
Available in full text
Date
November 1, 2006
Authors
Publisher
Institute of Electrical and Electronics Engineers (IEEE)