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Publications by Andreas Veneris
Robust QBF Encodings for Sequential Circuits With Applications to Verification, Debug, and Test
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
Automated Design Debugging With Maximum Satisfiability
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Bounded Model Debugging
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Debugging With Dominance: On-The-Fly RTL Debug Solution Implications
Functional Fault Equivalence and Diagnostic Test Generation in Combinational Logic Circuits Using Conventional ATPG
Journal of Electronic Testing: Theory and Applications (JETTA)
Electronic Engineering
Electrical
Efficient SAT-based Boolean Matching for FPGA Technology Mapping
Spatial and Temporal Design Debug Using Partial MaxSAT
Automating Logic Rectification by Approximate SPFDs
