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Publications by C.K. Chung
FPGA Based Runtime Configurable Clause Evaluator for SAT Problems
Electronics Letters
Electronic Engineering
Electrical
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Efficient SAT-based Boolean Matching for FPGA Technology Mapping
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Towards Fewer Parameters for SAT Clause Weighting Algorithms
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A Hybrid Learnt Clause Evaluation Algorithm for SAT Problem
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A Variable Neighborhood Walksat-Based Algorithm for MAX-SAT Problems
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The Design and Implementation of Configurable Time-Delay Simulator Based on FPGA
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A Logical Deduction Based Clause Learning Algorithm for Boolean Satisfiability Problems
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Exploiting FPGA-Aware Merging of Custom Instructions for Runtime Reconfiguration
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