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Publications by J. S. Rajesh
Energy Efficient Network-On-Chip Architectures for Many-Core Near-Threshold Computing System
Journal of Low Power Electronics
Electronic Engineering
Electrical
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Computing Probable Maximum Loss in Catastrophe Reinsurance Portfolios on Multi-Core and Many-Core Architectures
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A Technique for Low Energy Mapping and Routing in Network-On-Chip Architectures
Algorithmic Advances in Parallel Architectures and Energy‐efficient Computing
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Hybrid Silicon-Photonic Network-On-Chip for Future Generations of High-Performance Many-Core Systems
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Optimizing Streaming Parallelism on Heterogeneous Many-Core Architectures
IEEE Transactions on Parallel and Distributed Systems
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Application Mapping Algorithms for Mesh-Based Network-On-Chip Architectures
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An Extended Diagonal Mesh Topology for Network-On-Chip Architectures
International Journal of Multimedia and Ubiquitous Engineering
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Training Images-Based Stochastic Simulation on Many-Core Architectures
Resource Efficient Finite Element Computing on Multicore Architectures
Izvestiya Instituta Matematiki i Informatiki Udmurtskogo Gosudarstvennogo Universiteta
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