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Publications by J.H. Harden
Phased Logic: Supporting the Synchronous Design Paradigm With Delay-Insensitive Circuitry
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
Related publications
Design and Performance Analysis of Delay Insensitive Multi-Ring Structures
A Temperature-Insensitive Self-Recharging Circuitry Used in DRAMs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware
Electronic Engineering
Electrical
Architecture
Software
A Coarse-Grain Phased Logic CPU
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
Termination of Logic Programs With Delay Declarations
The Journal of Logic Programming
Quasi-Delay-Insensitive Circuits Are Turing-Complete
SpecSyn: An Environment Supporting the Specify-Explore-Refine Paradigm for Hardware/Software System Design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware
Electronic Engineering
Electrical
Architecture
Software
A Notation for Designing Restoring Logic Circuitry in CMOS
Microelectronics Journal
Strategic Paradigm of Supporting Students With Disabilities: Social-Pedagogical Aspect
Pedagogical Review
Self-Calibrating Source Synchronous Communication for Delay Variation Tolerant GALS Network-On-Chip Design
International Journal of Embedded and Real-Time Communication Systems
Computer Science
