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Publications by Kazutoshi HIROSE
Dither NN: Hardware/Algorithm Co-Design for Accurate Quantized Neural Networks
IEICE Transactions on Information and Systems
Electronic Engineering
Pattern Recognition
Hardware
Computer Vision
Electrical
Architecture
Artificial Intelligence
Software
Related publications
PULP-NN: Accelerating Quantized Neural Networks on Parallel Ultra-Low-Power RISC-V Processors
Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences
Mathematics
Engineering
Astronomy
Physics
Hardware–software Co-Design of an Iris Recognition Algorithm
IET Information Security
Computer Networks
Software
Information Systems
Communications
A Simplified Design of Multiplier for Multi Layer Feed Forward Hardware Neural Networks
International Journal of Research in Engineering and Technology
Hardware Implementation of Artificial Neural Networks Using Back Propagation Algorithm on Fpga
International Journal of Research in Engineering and Technology
3DQ: Compact Quantized Neural Networks for Volumetric Whole Brain Segmentation
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
Improved PSO Algorithm for Training of Neural Network in Co-Design Architecture
International Journal of Computer Applications
Hardware Implementation of Artificial Neural Networks for Vibroacoustic Signals Classification
Acta Physica Polonica A
Astronomy
Physics
Hardware/Software Co-Design for Energy-Efficient Seismic Modeling
Estimation From Quantized Gaussian Measurements: When and How to Use Dither
IEEE Transactions on Signal Processing
Electronic Engineering
Signal Processing
Electrical
