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Publications by Lars-Erik Wernersson

Vertical InAs/InGaAs Heterostructure MOSFETs on Si

Nano Letters
Materials ScienceCondensed Matter PhysicsMechanical EngineeringNanoscienceBioengineeringNanotechnologyChemistry
2017English

III–V Nanowire Complementary Metal–Oxide Semiconductor Transistors Monolithically Integrated on Si

Nano Letters
Materials ScienceCondensed Matter PhysicsMechanical EngineeringNanoscienceBioengineeringNanotechnologyChemistry
2015English

RF Characterization of Vertical InAs Nanowire Wrap-Gate Transistors Integrated on Si Substrates

IEEE Transactions on Microwave Theory and Techniques
Electronic EngineeringRadiationElectricalCondensed Matter Physics
2011English

Scaling of Vertical InAs–GaSb Nanowire Tunneling Field-Effect Transistors on Si

IEEE Electron Device Letters
Electronic EngineeringOpticalElectricalMagnetic MaterialsElectronic
2016English

Low-Frequency Noise in III-V Nanowire TFETs and MOSFETs

IEEE Electron Device Letters
Electronic EngineeringOpticalElectricalMagnetic MaterialsElectronic
2017English

Vertical Nanowire TFETs With Channel Diameter Down to 10 Nm and Point S MIN of 35 mV/decade

IEEE Electron Device Letters
Electronic EngineeringOpticalElectricalMagnetic MaterialsElectronic
2018English

Enhanced Sb Incorporation in InAsSb Nanowires Grown by Metalorganic Vapor Phase Epitaxy

Applied Physics Letters
AstronomyPhysics
2011English

InAs-oxide Interface Composition and Stability Upon Thermal Oxidation and High-K Atomic Layer Deposition

AIP Advances
NanotechnologyAstronomyPhysicsNanoscience
2018English

Thin Electron Beam Defined Hydrogen Silsesquioxane Spacers for Vertical Nanowire Transistors

Journal of Vacuum Science and Technology B:Nanotechnology and Microelectronics
SurfacesElectronic EngineeringCondensed Matter PhysicsInstrumentationElectronicOpticalMaterials ChemistryElectricalMagnetic MaterialsFilmsProcess ChemistryCoatingsTechnology
2014English

Vertical InAs Nanowire MOSFETs With IDS = 1.34 mA/µm and Gm = 1.19 mS/µm at VDS = 0.5 V

2012English

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