Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by M.S. Hanay
Multi-Chip Implementation of a High-Speed Sorting Engine Based on Rank-Ordering
Related publications
A Parallelized Implementation of Turbo Decoding Based on Network on Chip Multi - Core Processor
Journal of Engineering Science and Technology Review
Engineering
Indicating the High-Speed Multi-Cylinder Internal-Combustion Engine
High-Speed, SAD Based Wavefront Sensor Architecture Implementation on FPGA
Journal of Signal Processing Systems
Control
Systems Engineering
Information Systems
Signal Processing
Simulation
Hardware
Architecture
Modeling
Theoretical Computer Science
A Multi-Chip Data Acquisition System Based on a Heterogeneous System-On-Chip Platform
Springer proceedings in physics
High Energy Physics
Nuclear
A DSP Based POD Implementation for High Speed Multimedia Communications
Eurasip Journal on Advances in Signal Processing
Hardware
Electronic Engineering
Signal Processing
Electrical
Architecture
Complexity Optimization and High-Throughput Low-Latency Hardware Implementation of a Multi-Electrode Spike-Sorting Algorithm
IEEE Transactions on Neural Systems and Rehabilitation Engineering
Internal Medicine
Medicine
Computer Science Applications
Biomedical Engineering
Neuroscience
Design of On-Chip Testing Memory for High Speed Circuits
CVR Journal of Science & Technology
On-Chip High Speed Localized Cooling Using Superlattice Microrefrigerators
IEEE Transactions on Components and Packaging Technologies
A Multi-Chip Synchronization System Based on Diversity Technique
