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Publications by Masanori HARIYAMA
Architecture of an Asynchronous FPGA for Handshake-Component-Based Design
IEICE Transactions on Information and Systems
Electronic Engineering
Pattern Recognition
Hardware
Computer Vision
Electrical
Architecture
Artificial Intelligence
Software
Evaluation of an FPGA-Based Heterogeneous Multicore Platform With SIMD/MIMD Custom Accelerators
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Electronic Engineering
Computer Graphics
Signal Processing
Applied Mathematics
Electrical
Computer-Aided Design
Related publications
Design Approach for Fault Tolerance in FPGA Architecture
International Journal of VLSI Design & Communication Systems
An FPGA-based Architecture for Real Time Image Feature Extraction
Design of Asynchronous Viterbi Decoder Using Pipeline Architecture
International Journal for Research in Applied Science and Engineering Technology
Pattern-Based Design of an Asynchronous Invocation Framework for Web Services
International Journal of Web Services Research
Computer Networks
Software
Information Systems
Communications
An Extensible Type System for Component-Based Design
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
Design of Hybrid LUT/MUX FPGA Logic Architecture for Size Reduction and Performance Improvement in FPGA
International Journal of Innovative Technology and Exploring Engineering
Mechanics of Materials
Electronic Engineering
Civil
Structural Engineering
Electrical
Computer Science
Hardware Architecture for Real-Time Computation of Image Component Feature Descriptors on a FPGA
International Journal of Distributed Sensor Networks
Computer Networks
Engineering
Communications
Novel Design of 32-Bit Asynchronous (RISC) Microprocessor & Its Implementation on FPGA
International Journal of Information Engineering and Electronic Business
Applying Dynamic Change Impact Analysis in Component-Based Architecture Design