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Publications by Neethu Bhaskar
Parallel AES Encryption Engine for Many Core Processor Arrays Using Masked S-Box
International Journal of Recent Contributions from Engineering, Science & IT (iJES)
Related publications
Double Security Using Dynamic S-Box Inside Aes Algorithm
International Journal of Engineering and Advanced Technology
Engineering
Computer Science Applications
Environmental Engineering
A 345 mW Heterogeneous Many-Core Processor With an Intelligent Inference Engine for Robust Object Recognition
IEEE Journal of Solid-State Circuits
Electronic Engineering
Electrical
FPGA Based Implementation of AES Encryption and Decryption With Low Power Multiplexer LUT Based S-Box
IOSR Journal of Electronics and Communication Engineering
A Methodology for Precise Comparisons of Processor Core Architectures for Homogeneous Many-Core DSP Platforms
GPU Acceleration for Simulating Massively Parallel Many-Core Platforms
IEEE Transactions on Parallel and Distributed Systems
Hardware
Computational Theory
Signal Processing
Architecture
Mathematics
Modified AES S-Box Based on Determinant Matrix Algorithm
International Journal of Advanced Research in Computer Science and Software Engineering
BiShard Parallel Processor: A Disk-Based Processing Engine for Billion-Scale Graphs
International Journal of Multimedia and Ubiquitous Engineering
Computer Science
Digital Image Encryption Using AES and Random Number Generator
Iraqi Journal for Electrical and Electronic Engineering
CMOS-Memristor Hybrid Nanoelectronics for AES Encryption
