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Publications by P.M. Heysters
Towards Software Defined Radios Using Coarse-Grained Reconfigurable Hardware
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware
Electronic Engineering
Electrical
Architecture
Software
Lessons Learned From Designing the MONTIUM - A Coarse-Grained Reconfigurable Processing Tile -
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Regular Mapping for Coarse-Grained Reconfigurable Architectures
High-Level Programming of Coarse-Grained Reconfigurable Architectures
Still Image Processing on Coarse-Grained Reconfigurable Array Architectures
Journal of Signal Processing Systems
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Signal Processing
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Theoretical Computer Science
A Coarse-Grained Reconfigurable Architecture With Compilation for High Performance
International Journal of Reconfigurable Computing
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Mapping Parallel FFT Algorithm Onto SmartCell Coarse-Grained Reconfigurable Architecture
Trends in Broadband Wireless Communication Systems and Software Defined Radios
Interdisciplinary Information Sciences
Hardware Transactional Memory With Software-Defined Conflicts
Transactions on Architecture and Code Optimization
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Optimization of Body Biasing for Variable Pipelined Coarse-Grained Reconfigurable Architectures
IEICE Transactions on Information and Systems
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Evaluating Memory Architectures for Media Applications on Coarse-Grained Reconfigurable Architectures
International Journal of Embedded Systems
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