Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by Ravinder Singh Sawhney
32 Nm Gate Length FinFET: Impact of Doping
International Journal of Computer Applications
Related publications
Sub-50 Nm P-Channel FinFET
IEEE Transactions on Electron Devices
Electronic Engineering
Optical
Electrical
Magnetic Materials
Electronic
FinFET Device Simulation and NAND Gate Implementation Using DG FinFET
Communications on Applied Electronics
Novel Dual-VTH Independent-Gate FinFET Circuits
Impact of Gate-Length Biasing on Threshold-Voltage Selection
Design Consideration and Impact of Gate Length Variation on Junctionless Strained Double Gate MOSFET
International Journal of Recent Technology and Engineering
Engineering
Management of Technology
Innovation
Statistical Reliability Analysis of NBTI Impact on FinFET SRAMs and Mitigation Technique Using Independent-Gate Devices
Advantage of Plasma Doping for Source/Drain Extension in Bulk-FinFET
Design Optimization and Modeling of Charge Trap Transistors (CTTs) in 14 Nm FinFET Technologies
IEEE Electron Device Letters
Electronic Engineering
Optical
Electrical
Magnetic Materials
Electronic
The Influence of Gate Poly-Silicon Oxidation on Negative Bias Temperature Instability in 3D FinFET
