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Publications by S. Rezgui
Predicting Error Rate for Microprocessor-Based Digital Architectures Through C.E.U. (Code Emulating Upsets) Injection
IEEE Transactions on Nuclear Science
Electronic Engineering
Nuclear
Nuclear Energy
High Energy Physics
Engineering
Electrical
Related publications
Digital Image Watermarking Based on Mixed Error Correcting Code
Journal of Information Security
Expression-Tree-Based Algorithms for Code Compression on Embedded RISC Architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware
Electronic Engineering
Electrical
Architecture
Software
Noise Impact of Single-Event Upsets on an FPGA-based Digital Filter
Forward Error Correcting Code for High Data Rate LEO Satellite Optical Downlinks
Concurrent Design Error Simulation for High-Level Microprocessor Implementations
Code Scheduling for Multiple Instruction Stream Architectures
International Journal of Parallel Programming
Theoretical Computer Science
Information Systems
Software
Microprocessor-Based Ventilation Control System for Calves Feeding as an Element of Digital Technology
The Development of Microprocessor-Based Digital Devices of Monitoring and Control
Vestnik Volgogradskogo gosudarstvennogo universiteta. Serija 10. Innovatcionnaia deiatel’nost’
Performance Enhancement of Bit Error Rate With Increased Capacity Using Modified SIC-MUD for Polar Code Based OFDM-IDMA System for 5G
International Journal of Innovative Technology and Exploring Engineering
Mechanics of Materials
Electronic Engineering
Civil
Structural Engineering
Electrical
Computer Science
