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Publications by Sagun Sudhansu
FPGA Implementation of Digital Modulation Techniques BPSK and QPSK Using HDL Verilog
International Journal of Computer Applications
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FPGA Implementation of Low Power Digital QPSK Modulator Using Verilog HDL
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Performance Enhancement of Serially Concatenated Codes by BPSK and QPSK Techniques
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Simulation of 16 Bit ALU Using Verilog-HDL
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Design and Implementation of Synthesizable 32-Bit Four Stage Pipelined RISC Processor in FPGA Using Verilog/VHDL
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Efficient and Low Latency Turbo Encoder Design Using Verilog-HDL
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Architecture
Hardware
Engineering
Chemical Engineering
Biotechnology
Environmental Engineering
Computer Science
Punctured Turbo-Codes for BPSK/QPSK Channels
IEEE Transactions on Communications
Electronic Engineering
Electrical
Comparison Between FPGA Implementation of Discrete Wavelet Transform, Dual Tree Complex Wavelet Transform and Double Density Dual Tree Complex Wavelet Transform in Verilog HDL
International Journal of Trend in Scientific Research and Development
