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Publications by Tohru Furuyama
Test Time Reduction Technique for Dynamic RAMs
IEEJ Transactions on Electronics, Information and Systems
Electronic Engineering
Electrical
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2.2.1 Test Time Reduction by Optimal Test Sequencing1
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An Integrated Technique for Test Vector Selection and Test Scheduling Under Test Time Constraint
A Response Time Reduction for DC Motor Controller Using SISO Technique
Indonesian Journal of Electrical Engineering and Computer Science
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A Model Reduction Technique in Space and Time for Fatigue Simulation
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A Continuous-Time Ripple Reduction Technique for Spinning-Current Hall Sensors
Decompression Hardware Determination for Test Volume and Time Reduction Through Unified Test Pattern Compaction and Compression
Real Time Dynamic Test on a Model Pile Foundation
Proceedings of the Japan Society of Civil Engineers
