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Publications by Vikas Tiwari
Area-Delay Efficient Flipping 2-D DWT Structure Using PEB Booth Multiplier
International Journal of Computer Applications
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Design of Booth Multiplier Using Double Gate MOSFET
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Design of Area Efficient R2MDC FFT Using Optimized Complex Multiplier
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A High-Efficient Line-Based Architecture for 2-D Lifting-Based DWT Using 9/7 Wavelet Filters
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