Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications in Computer Graphics
Nontree Routing for Reliability and Yield Improvement
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Collecting Data About Logic Simulation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Redundancy and Testability in Digital Filter Datapaths
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Matching-Based Methods for High-Performance Clock Routing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Complexity of Two-Level Logic Minimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Two Novel Multiway Circuit Partitioning Algorithms Using Relaxed Locking
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Local At-Speed Scan Enable Generation for Transition Fault Testing Using Low-Cost Testers
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Reflections on the Nature of Interaction†
CoDesign
Visual Arts
Performing Arts
Computer Graphics
Computer-Aided Design
Architecture
Synthesis of Power-Managed Sequential Components Based on Computational Kernel Extraction
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
A Joint Gate Sizing and Buffer Insertion Method for Optimizing Delay and Power in CMOS and BiCMOS Combinational Logic
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
‹
198
199
200
201
202
203
204
›