The Effects of Transistor Source-To-Gate Bridging Faults in Complex CMOS Gates

IEEE Journal of Solid-State Circuits - United States
doi 10.1109/4.78282
Full Text
Abstract

Available in full text

Date
Authors
Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Related search

Logic Testing of Bridging Faults in CMOS Integrated Circuits

IEEE Transactions on Computers
HardwareArchitectureMathematicsComputational TheoryTheoretical Computer ScienceSoftware
1998English

Double-Gate Two-Step Source/Drain Poly-Si Thin-Film Transistor

Coatings
SurfacesFilmsCoatingsMaterials ChemistryInterfaces
2019English

Suppression of Imd3 in Cmos Power Amplifier Using Bias Circuit of Common-Gate Transistor With Cascode Structure

Progress In Electromagnetics Research M
OpticalElectronicCondensed Matter PhysicsMagnetic Materials
2019English

Transistor Sizing of Logic Gates to Maximize Input Delay Variability

Journal of Low Power Electronics
Electronic EngineeringElectrical
2006English

Systematic Study of Back-Gate Bias Effects in Ultrathin-Box Tri-Gate (UTBT) Transistor With 10nm-Diameter Nanowire Channel

2012English

Investigation of Intermittent Resistive Faults in Digital CMOS Circuits

Journal of Circuits, Systems and Computers
HardwareElectronic EngineeringElectricalArchitecture
2015English

Molecular Floating-Gate Single-Electron Transistor

Scientific Reports
Multidisciplinary
2017English

Standard CMOS Based One-Time Programmable Switches With Gate-Induced Permanent Source-Drain Path

2013English

Learning Logic Gate Through 7-Gates Game

International Journal of Multimedia and Recent Innovation
2020English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2024 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy