Amanote Research

Amanote Research

  • Register
  • Sign In

Efficient Explicit Pulsed Double Edge Triggered Flip-Flop by Using Dependency on Data

IOSR Journal of Electronics and Communication Engineering

doi 10.9790/2834-0210107

Full Text

Abstract

Available in

Date

January 1, 2012

Authors

Tania Gupta

Publisher

IOSR Journals


Related search

Double-Edge-Triggered Flip-Flops

IEEE Transactions on Computers
HardwareArchitectureMathematicsComputational TheoryTheoretical Computer ScienceSoftware
1981English

A New Design of Double Edge Triggered Flip-Flops

English

Area Efficient SR Flip-Flop Designed Using 90nm CMOS Technology

International Journal of Advanced Technology and Engineering Exploration
2018Spanish

Review Paper on Power Efficient Hybrid D-Flip Flop

International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering
2013English

Novel Low Complexity Pulse-Triggered Flip-Flop for Wireless Baseband Applications

ISRN Electronics
2013English

"Flip Flop" Sandals.

BMJ
1967English

Design of Low Power Negative Pulse-Triggered Flip-Flop With Enhanced Latch

IOSR Journal of VLSI and Signal Processing
2013English

Flip-Flop Chaining Architecture for Power-Efficient Scan During Test Application

2005English

A Simple Flip-Flop Circuit

Journal of the Experimental Analysis of Behavior
Behavioral NeuroscienceExperimentalCognitive Psychology
1962English

Amanote Research

Note-taking for researchers

Follow Amanote


© 2026 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy