Amanote Research

Amanote Research

    RegisterSign In

Fast FPGA-based Pipelined Digit-Serial/Parallel Multipliers

doi 10.1109/iscas.1999.777931
Full Text
Open PDF
Abstract

Available in full text

Date

Unknown

Authors
J. VallsT. SansaloniM.M. PeiroE. Boemo
Publisher

IEEE


Related search

Radix-2n Serial–serial Multipliers

IEE Proceedings - Circuits, Devices and Systems
2004English

A Digit Pipelined Dynamic Time Warp Processor.

1986English

FPGA Implementation of 16-Bit Multipliers Based Upon Vedic Mathematic Approach

Jurnal Rekayasa Elektrika
2014English

Digit-Level Serial-In Parallel-Out Multiplier Using Redundant Representation for a Class of Finite Fields

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
HardwareElectronic EngineeringElectricalArchitectureSoftware
2017English

Energy-Efficient FPGA-Based Parallel Quasi-Stochastic Computing

Journal of Low Power Electronics and Applications
Electronic EngineeringElectrical
2017English

An FPGA-Based Massively Parallel Neuromorphic Cortex Simulator

Frontiers in Neuroscience
Neuroscience
2018English

Fast Digit-Index Permutations

Scientific Programming
Computer Science ApplicationsSoftware
1996English

A Fast and Accurate FPGA System for Short Read Mapping Based on Parallel Comparison on Hash Table

IEICE Transactions on Information and Systems
Electronic EngineeringPattern RecognitionHardwareComputer VisionElectricalArchitectureArtificial IntelligenceSoftware
2017English

Efficient Parallel-Pipelined GHASH for Message Authentication

2012English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2026 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy