Integrated Design of Low-Power Adiabatic Dynamic CMOS Logic Using 0.18μm Standard CMOS Model for Circadian Rhythm OLED Illumination System

International Journal of Control and Automation - South Korea
doi 10.14257/ijca.2017.10.11.05
Full Text
Abstract

Available in full text

Date
Authors
Publisher

NADIA

Related search

Low-Power Design of Adiabatic Dynamic CMOS Logic Using Parasitic Capacitance of 0.18μm Standard CMOS Model

2017English

Design of Low Power Barrel Shifter and Rotator Using Two Phase Clocked Adiabatic Static Cmos Logic

International Journal of Research in Engineering and Technology
2014English

CMOS VLSI Design of Low Power Comparator Logic Circuits

Asian Journal of Scientific Research
Multidisciplinary
2014English

Low Power SAR-ADC in 0.18μm Mixed-Mode CMOS Process for Biomedical Applications

IOSR Journal of VLSI and Signal Processing
2013English

A Programmable Electrochemical Biosensor Array in 0.18μm Standard CMOS

English

CMOS Low Power Cell Library for Digital Design

International Journal of VLSI Design & Communication Systems
2013English

Low Power CMOS LNA and Mixer Design

IOSR Journal of Electronics and Communication Engineering
2012English

A Low-Power Fully Integrated CMOS RF Receiver for 2.4-GHz-Band IEEE 802.15.4 Standard

2015English

Design of Low Power SAR ADC for ECG Using 45nm CMOS Technology

International Journal of VLSI Design & Communication Systems
2017English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2025 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy