Design of Low Power Barrel Shifter and Rotator Using Two Phase Clocked Adiabatic Static Cmos Logic

International Journal of Research in Engineering and Technology
doi 10.15623/ijret.2014.0309002
Full Text
Abstract

Available in full text

Date
Authors
Publisher

eSAT Publishing House

Related search

Low-Power Design of Adiabatic Dynamic CMOS Logic Using Parasitic Capacitance of 0.18μm Standard CMOS Model

2017English

Integrated Design of Low-Power Adiabatic Dynamic CMOS Logic Using 0.18μm Standard CMOS Model for Circadian Rhythm OLED Illumination System

International Journal of Control and Automation
ControlSystems Engineering
2017English

Gate Leakage Reduction by Clocked Power Supply of Adiabatic Logic Circuits

Advances in Radio Science
2005English

CMOS VLSI Design of Low Power Comparator Logic Circuits

Asian Journal of Scientific Research
Multidisciplinary
2014English

Optimized Logarithmic Barrel Shifter in Reversible Logic Synthesis

2015English

Low-Power Adiabatic Computing With Modified Quasi Static Energy Recovery Logic of MQSERL 4x4 Multiplier

International Journal of Recent Technology and Engineering
EngineeringManagement of TechnologyInnovation
2019English

Adiabatic Logic Circuits for Low Power VLSI Applications

International Journal of Science and Research (IJSR)
2016English

Cascadable Adiabatic Logic Circuits for Low-Power Applications

IET Circuits, Devices and Systems
ControlSystems EngineeringElectricalElectronic Engineering
2008English

Low Power CMOS LNA and Mixer Design

IOSR Journal of Electronics and Communication Engineering
2012English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2024 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy