A Comparative Review on ALU Using CMOS and GDI Techniques for Power Dissipation and Propagation Delay

IJOSTHE
doi 10.24113/ojssports.v7i1.119
Full Text
Abstract

Available in full text

Date
Authors
Publisher

Smart Moves

Related search

Performance Analysis of a Universal Circuit for Reversible ALU Using QCA & CMOS Technology

International Journal of Engineering and Technology(UAE)
ArchitectureHardwareEngineeringChemical EngineeringBiotechnologyEnvironmental EngineeringComputer Science
2018English

Power and Delay Estimation of Universal and Exclusive Gates Using Static and Dynamic CMOS Design

International Journal of Engineering and Advanced Technology
EngineeringComputer Science ApplicationsEnvironmental Engineering
2019English

Design and Implementation of Kogge Stone Adder Using CMOS and GDI Design: VLSI Based

International Journal of Engineering and Advanced Technology
EngineeringComputer Science ApplicationsEnvironmental Engineering
2019English

A Fast ALU Design in CMOS for Low Voltage Operation

VLSI Design
Electronic EngineeringComputer GraphicsHardwareElectricalArchitectureComputer-Aided Design
2002English

A Joint Gate Sizing and Buffer Insertion Method for Optimizing Delay and Power in CMOS and BiCMOS Combinational Logic

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ElectricalSoftwareComputer GraphicsComputer-Aided DesignElectronic Engineering
1998English

Estimation of Power Dissipation Using a Novel Power Macromodeling Technique

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ElectricalSoftwareComputer GraphicsComputer-Aided DesignElectronic Engineering
2000English

Delay Analysis of Half Subtractor Using CMOS and Pass Transistor Logic

International Journal of Computer Applications
2016English

Design of Low Delay Ring Oscillator Using CMOS

International Journal of Engineering and Technology(UAE)
ArchitectureHardwareEngineeringChemical EngineeringBiotechnologyEnvironmental EngineeringComputer Science
2018English

Techniques for Sub-Threshold Leakage Reduction in Low Power CMOS Circuit Designs

International Journal of Computer Applications
2014English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2024 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy