Amanote Research

Amanote Research

    RegisterSign In

Fourier Analysis-Based Automatic Test Pattern Generation for Combinational Circuits

doi 10.1109/siu.2015.7129939
Full Text
Open PDF
Abstract

Available in full text

Date

May 1, 2015

Authors
Tolga Ayav
Publisher

IEEE


Related search

Functional Fault Equivalence and Diagnostic Test Generation in Combinational Logic Circuits Using Conventional ATPG

Journal of Electronic Testing: Theory and Applications (JETTA)
Electronic EngineeringElectrical
2005English

Semi-Automatic Search-Based Test Generation

2012English

Reducibility of Sequential Test Generation to Combinational Test Generation for Several Delay Fault Models

2003English

Ring Counter Based ATPG for Low Transition Test Pattern Generation

The Scientific World Journal
BiochemistryMedicineGeneticsMolecular BiologyEnvironmental Science
2015English

Using Static Analysis to Improve Automatic Test Generation

Lecture Notes in Computer Science
Computer ScienceTheoretical Computer Science
2000English

The Mechanical Generation of Fault Trees for Reactive Systems via Retrenchment I: Combinational Circuits

Formal Aspects of Computing
Theoretical Computer ScienceSoftware
2011English

Pseudo-Urban Automatic Pattern Generation

2003English

Circuit of the Functional Control for Combinational Circuits Based on R-Code

Problems of advanced micro- and nanoelectronic systems development
2018English

Automatic Generation of Test Cases

IBM Systems Journal
1970English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2025 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy