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Publications by Arun Palaniappan
A Design Methodology for Power Efficiency Optimization of High-Speed Equalized-Electrical I/O Architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware
Electronic Engineering
Electrical
Architecture
Software
Related publications
High-Efficiency Low-Power Flash ADC for High-Speed Transceivers
CVR Journal of Science & Technology
A High-Level Synthesis Methodology for Dedicated DSP Architectures
The International Conference on Electrical Engineering
High Efficiency Microwave Power Amplifier Design
Design Optimization of Parallel Manipulators for High-Speed Precision Machining Applications
IFAC Proceedings Volumes
Design and Simulation for a High-Efficiency Class-B Power Amplifier
MATEC Web of Conferences
Materials Science
Engineering
Chemistry
Adaptive Control Methodology for High-Performance Low-Power VLSI Design
Design Techniques for High-Speed I/Os: Challenges and Opportunities
Journal of Electrical & Electronic Systems
A Study of Optimization Techniques for 3D Networks-On-Chip Architectures for Low Power and High Performance Applications
International Journal of Computer Applications
Decoupled Computer Architectures for Very High-Speed Technologies
