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Publications by B.L. Bhuva
Single-Event Mitigation in Combinational Logic Using Targeted Data Path Hardening
IEEE Transactions on Nuclear Science
Electronic Engineering
Nuclear
Nuclear Energy
High Energy Physics
Engineering
Electrical
Related publications
Mitigation of Soft Errors on 65NM Combinational Logic Gates via Buffer Gate
International Journal of VLSI Design & Communication Systems
Functional Fault Equivalence and Diagnostic Test Generation in Combinational Logic Circuits Using Conventional ATPG
Journal of Electronic Testing: Theory and Applications (JETTA)
Electronic Engineering
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M-Of-N Code Decomposition for Indicating Combinational Logic
Intellectual Property Protection by Watermarking Combinational Logic Synthesis Solutions
Modeling of Single-Event Effects in Circuit-Hardened High-Speed SiGe HBT Logic
IEEE Transactions on Nuclear Science
Electronic Engineering
Nuclear
Nuclear Energy
High Energy Physics
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Seismic Event Interpretation Using Fuzzy Logic and Neural Networks
Regular Path Expressions in Feature Logic
Journal of Symbolic Computation
Computational Mathematics
Number Theory
Algebra
Regular Path Expressions in Feature Logic
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
On the Use of Evolutionary Programming for Combinational Logic Circuits Design
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
