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Publications by Douglas L. Maskell
Hardware Optimized and Error Reduced Approximate Adder
Electronics (Switzerland)
Control
Electronic Engineering
Signal Processing
Computer Networks
Systems Engineering
Hardware
Communications
Electrical
Architecture
A Time-Multiplexed FPGA Overlay With Linear Interconnect
Related publications
Hardware-Efficient FIR Filters With Reduced Adder Step
Electronics Letters
Electronic Engineering
Electrical
Accuracy-Configurable Adder for Approximate Arithmetic Designs
Optimized CMOS Design of Full Adder Using 45nm Technology
International Journal of Computer Applications
Incorporation of Reduced Full Adder and Half Adder Into Wallace Multiplier and Improved Carry-Save Adder for Digital FIR Filter
Circuits and Systems
Optimized Transform Coding for Approximate KNN Search
Applicability of Approximate Multipliers in Hardware Neural Networks
Neurocomputing
Computer Science Applications
Artificial Intelligence
Cognitive Neuroscience
Hardware-Based Implementation of the Common Approximate Substring Algorithm
Converting Approximate Error Bounds Into Exact Ones
Mathematics of Computation
Computational Mathematics
Applied Mathematics
Number Theory
Algebra
An HARQ Based Optimized Error Correction Technique
International Journal of Computer Applications
