Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by Jose Calero
PPM Reduction on Embedded Memories in System on Chip
12th IEEE European Test Symposium (ETS'07)
Related publications
Mapping Arbitrary Logic Functions Into Synchronous Embedded Memories for Area Reduction on FPGAs
IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
Computer Science Applications
Computer Graphics
Computer-Aided Design
Software
A Multi-Chip Data Acquisition System Based on a Heterogeneous System-On-Chip Platform
Springer proceedings in physics
High Energy Physics
Nuclear
On-Chip Digital Power Supply Control for System-On-Chip Applications
The Reliability of Semiconductor RAM Memories With On-Chip Error-Correction Coding
IEEE Transactions on Information Theory
Computer Science Applications
Information Systems
Library
Information Sciences
Measurement and Management of the Level of Quality Control Process in SoC (System on Chip) Embedded Software Development
International Journal of Advanced Robotic Systems
System-On-Chip Design and Implementation
IEEE Transactions on Education
Electronic Engineering
Education
Electrical
Virtualizing On-Chip Distributed ScratchPad Memories for Low Power and Trusted Application Execution
Design Automation for Embedded Systems
Hardware
Architecture
Software
Reliable Multiprocessor System-On-Chip Synthesis
Erratum For: An On-Wafer Embedded Passive Device Using Chip-In-Substrate Packaging Technology
Microwave and Optical Technology Letters
Electronic Engineering
Condensed Matter Physics
Electronic
Molecular Physics,
Optical
Electrical
Atomic
Magnetic Materials
Optics
