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Publications by Jose Luis Garcia-Dorado
Batch to the Future: Analyzing Timestamp Accuracy of High-Performance Packet I/O Engines
IEEE Communications Letters
Electronic Engineering
Simulation
Computer Science Applications
Electrical
Modeling
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Timestamp-Based Result Cache Invalidation for Web Search Engines
Framework for Analyzing Android I/O Stack Behavior: From Generating theWorkload to Analyzing the Trace
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High Performance Packet Processing With FlexNIC
ACM SIGARCH Computer Architecture News
Synthesis of High-Performance Packet Processing Pipelines
Proceedings - Design Automation Conference
Control
Systems Engineering
Electronic Engineering
Simulation
Hardware
Computer Science Applications
Electrical
Architecture
Modeling
High Performance Transducer Architecture for Content Inspection Engines
A New Data Sieving Approach for High Performance I/O
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Industrial
Manufacturing Engineering
On the Performance of the POSIX I/O Interface to PVFS
Delay Performance of High-Speed Packet Switches With Low Speedup
Benchmarking the CGNS I/O Performance
