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Publications by NITIN R. CHAVAN

VHDL Implementation of AES-128 on FPGA

IJIREEICE
2015English

Related publications

Implementation of AES on FPGA

IOSR journal of VLSI and Signal Processing
2014English

An Efficient FPGA Implementation of AES Algorithm

International Journal of Engineering Research and
2016English

Hardware Implementation of AES Encryption and Decryption System Based on FPGA

Open Cybernetics and Systemics Journal
ControlSystems EngineeringMathematics
2015English

FPGA Implementation of RS Codec With Interleaver in DVB-T Using VHDL

International Journal of Engineering and Technology(UAE)
ArchitectureHardwareEngineeringChemical EngineeringBiotechnologyEnvironmental EngineeringComputer Science
2017English

Structural Evaluation of AES and Chosen-Key Distinguisher of 9-Round AES-128

Lecture Notes in Computer Science
Computer ScienceTheoretical Computer Science
2013English

Fast Hardware Implementation of AES-128 Algorithm in Streaming Output Feedback Mode for Real Time Ciphering

International Journal of Security and its Applications
Computer Science
2017English

Desarrollo De Encriptado AES en FPGA

English

A Low Cost FPGA Implementation of Real Time Video Cryptography System Using AES (Rijndael) Algorithm.

The International Conference on Electrical Engineering
2012English

VHDL Implementation of Nor Flash Controller

International Journal of Electronics and Communication Engineering
2017English

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