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Publications by S. Ikenaga
Dual-Operating-Voltage Scheme for a Single 5-V 16-Mbit DRAM
IEEE Journal of Solid-State Circuits
Electronic Engineering
Electrical
Related publications
A 2.5-V, 72-Mbit, 2.0-GByte/S Packet-Based DRAM With a 1.0-GBPS/Pin Interface
IEEE Journal of Solid-State Circuits
Electronic Engineering
Electrical
A Dual Grain Hit-Miss Detector for Large Die-Stacked DRAM Caches
A Dual Two-Level Inverter Scheme With Common Mode Voltage Elimination for an Induction Motor Drive
IEEE Transactions on Power Electronics
Electronic Engineering
Electrical
Oxide-Nitride Storage Dielectric Formation in a Single-Furnace Process for Trench DRAM
IEEE Electron Device Letters
Electronic Engineering
Optical
Electrical
Magnetic Materials
Electronic
A Dual Mode MPC Scheme for Nonlinear Processes
IFAC Proceedings Volumes
Dual Orientation 16-MHz Single-Element Ultrasound Needle Transducers for Image-Guided Neurosurgical Intervention
IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control
Instrumentation
Acoustics
Ultrasonics
Electrical
Electronic Engineering
DH-LRU: Dynamic Hybrid LRU Caching Scheme for PRAM/DRAM Hybrid Main Memory
International Journal of Grid and Distributed Computing
Computer Science
A 50nW Voltage Monitor Scheme for Minimum Energy Sensor Systems
A Dual-Field Sensing Scheme for a Guidance System for the Blind
Sensors
Instrumentation
Information Systems
Electronic Engineering
Biochemistry
Analytical Chemistry
Molecular Physics,
Electrical
Atomic
Medicine
Optics
