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Publications by Sachin S. Sapatnekar
Improving STT-MRAM Density Through Multibit Error Correction
Improving STT-MRAM Density Through Multibit Error Correction
BTI-aware Design Using Variable Latency Units
Random Walks in a Supply Network
Congestion-Aware Power Grid Optimization for 3D Circuits Using MIM and CMOS Decoupling Capacitors
Related publications
Power-Aware Voltage Tuning for STT-MRAM Reliability
STT-MRAM Memory Cells With Enhanced on/Off Ratio
Field Driven STT-MRAM Cell for Reduced Switching Latency and Energy
From STT-MRAM to Voltage-Control Spintronics Memory (VoCSM) in Pursuit of Memory Systems With Lower Energy Consumption
Journal of Magnetics
Electronic Engineering
Condensed Matter Physics
Optical
Electrical
Magnetic Materials
Electronic
Rational Error Correction
SSRN Electronic Journal
Probabilistic Crisscross Error Correction
IEEE Transactions on Information Theory
Computer Science Applications
Information Systems
Library
Information Sciences
Cointegration and Error Correction
Minimally-Augmented Grammatical Error Correction
