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Publications by Saket Srivastava

Tagged Repair Techniques for Defect Tolerance in Hybrid Nano/Cmos Architecture

IEEE Transactions on Nanotechnology
Electronic EngineeringNanotechnologyComputer Science ApplicationsElectricalNanoscience
2011English

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Performance Simulation and Analysis of a CMOS/nano Hybrid Nanoprocessor System

Nanotechnology
Mechanics of MaterialsElectronic EngineeringMechanical EngineeringMaterials ScienceNanoscienceElectricalBioengineeringNanotechnologyChemistry
2009English

Modeling Techniques for Strained CMOS Technology

2009English

Optical Techniques for Defect Evaluation in Vehicles

2012English

CMOS-Memristor Hybrid Nanoelectronics for AES Encryption

2013English

Hybrid Postprocessing Etching for CMOS-compatible MEMS

Journal of Microelectromechanical Systems
Electronic EngineeringElectricalMechanical Engineering
1997English

Design Techniques for Gate-Leakage Reduction in CMOS Circuits

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Multifunctional Nano-Architecture for Biomedical Applications

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Microfluidic-Based Screening of Resveratrol and Drug-Loading PLA/Gelatine Nano-Scaffold for the Repair of Cartilage Defect

Artificial Cells, Nanomedicine and Biotechnology
MedicineBiotechnologyBiomedical EngineeringPharmaceutical Science
2018English

Design Approach for Fault Tolerance in FPGA Architecture

International Journal of VLSI Design & Communication Systems
2011English

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