Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by Sandeep Sangwan
Performance Analysis of Full Adder Circuit Using Improved Feed Through Logic
International Journal of Computer Applications
Related publications
Enhanced Self Checking Carry Select Adder Using Dynamic Logic Based Full Adder
International Journal of Recent Technology and Engineering
Engineering
Management of Technology
Innovation
Design of Quantum Circuit for Full Adder Using HNG Gate
International Journal of Engineering and Technology
Transfer Processes
Fluid Flow
Mechanical Engineering
Aerospace Engineering
Low Power-Area Design of Full Adder Using Self Resetting Logic With GDI Technique
SSRN Electronic Journal
Designing a Full Adder Circuit Based on Quasi-Floating Gate
Energy and Power Engineering
Low Power Circuit for Brent-Kung Adder Based on Adiabatic Logic
International Journal of Advances in Signal and Image Sciences
Incorporation of Reduced Full Adder and Half Adder Into Wallace Multiplier and Improved Carry-Save Adder for Digital FIR Filter
Circuits and Systems
Optimized CMOS Design of Full Adder Using 45nm Technology
International Journal of Computer Applications
Efficient Serial Multiplier Design Using Ripple Counters,Kogge-Stone Adder and Full Adder
International Journal of Computer Applications
The Development of an Innovative Adder Design Evaluated Using Programmable Logic.
