Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by Tohru Ishihara
Single-Cycle-Accessible Two-Level Caches and Compilation Technique for Energy Reducion
IPSJ Transactions on System LSI Design Methodology
Electronic Engineering
Computer Science Applications
Electrical
An Optimization Technique for Low-Energy Embedded Memory Systems
IPSJ Transactions on System LSI Design Methodology
Electronic Engineering
Computer Science Applications
Electrical
Related publications
Static Energy Reduction Techniques for Microprocessor Caches
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware
Electronic Engineering
Electrical
Architecture
Software
Interleaving Behavioral and Cycle-Accurate Descriptions for Reconfigurable Hardware Compilation
Dynamic Dictionary-Based Data Compression for Level-1 Caches
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
Closed Relation Between Single-Particle Kinetic Energy and Electron Density in One-Dimensional Two-Level Systems
Acta Physica Polonica A
Astronomy
Physics
Mobile Source of High-Energy Single-Cycle Terahertz Pulses
Applied Physics B: Lasers and Optics
Astronomy
Physics
Writeback-Aware Partitioning and Replacement for Last-Level Caches in Phase Change Main Memory Systems
Transactions on Architecture and Code Optimization
Hardware
Information Systems
Architecture
Software
CLU: Co-Optimizing Locality and Utility in Thread-Aware Capacity Management for Shared Last Level Caches
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
Managing Distributed, Shared L2 Caches Through OS-Level Page Allocation
Proceedings of the Annual International Symposium on Microarchitecture, MICRO
Hardware
Engineering
Architecture
Energy Taxis in Escherichia Coli on the Single-Cell Level
Biophysical Journal
Biophysics
