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Publications by Tomoji Nakamura

Impact of Thermomechanical Stresses on Bumpless Chip in Stacked Wafer Structure

Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
EngineeringAstronomyPhysics
2013English

Integration of High Performance CMOS Logic LSI by Applying Cu Wiring to SiLKT.M./SiO2 Hybrid Structure

Materials Transactions
Mechanics of MaterialsMaterials ScienceCondensed Matter PhysicsMechanical Engineering
2002English

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